High-speed cmos dac/adc/pll analog design engineer
IrvineChelsea Search Group
...CMOS DAC/ADC/PLL Analog Design Engineer Locations: Irvine, CA, San Jose, CA or possibly remote US Citizen or US Permanent Resident preferred Full-time Employee + Bonus, Benefits, 401k, Stock Options Duties & Responsibilities: • Clock generation and distribution (VCOs, PLL, clock distribution, etc) • Design of custom passive [...]
Category Engineering & Architecture
5 days ago in PostJobFree