Senior high-speed analog layout engineer
IrvineChelsea Search Group
...reliability • Mentor and guide junior layout engineers/contractors across multiple time zones, enforcing best practices in layout design and verification • Perform and debug full hierarchy LVS, DRC, PERC, ERC, and other signoff checks using industry-standard tools (Pegasus, Calibre, etc.) • Contribute to chip-level [...]
Category IT & Telecommunications
2 days ago in PostJobFree